Watch Dog,Power,Code Protect?

[crazyahmet]

arkadaslar bu satırlar bir sayfada gözüme çarptı,bilen arkadaşlar
kısaca bu satırlar ne işe yarar söyleyebilir mi?

@ DEVICE pic16F628, WDT_on 'Watch Dog timer kapalı
@ DEVICE pic16F628, PWRT_ON 'Power on timer açık
@ DEVICE pic16F628, PROTECT_OFF 'Kod Protek kapalı

[INFINITY]

code protect pice yazdigin kodun korumanın on/off durumudur

power on timer da mesela picin çok hızlı işlem yapmasını engellemektir mesela bir pic ile lcd yi beraber takınca daha lcd init olmadan pic veri yollamaya başlar power on timer pici biraz durdurur sonra kaldıgı yerden devam ettirir bildiğim kadarıyla...

[mech]

power on reset pici ilk açılışta 190 ms kadar resette tutarak geç açılmasını sağlar. Böylece besleme voltajı tetiklemelerinde picin yanlış çalışması engellenebilir.

[remzi]

WDT_on 'Watch Dog timer kapalı

wdt bekçi köpeğidir. mikrodenetleyici kitlenince mikroyu en baş adrese gönderir. bekçi köpeği programcının belirlediği süre aralığında işlemi bitirip bitirmediğini kontrol eder. Bitiremişse reset alarak en baştan başlar. Bitirmişse problem olmaz program kaldığı yerden devam eder.

herkese kolay gelsin.

hayırlı işler....

[Eagle_Tim]

Şöylede yazılabilir ;

__config _HS_OSC & _WDT_OFF & _BODEN_OFF & _PWRTE_OFF & _MCLRE_ON & _LVP_OFF & _CP_OFF

OSC = HS tipi bu 10-20 Mhz için kullanılan OSC seçeneğidir.

WTD =  Bu yapı özel bir sayıcıdır, kullanım amaçları kısaca;

1- Bütün PIC lerde MCRL ucu bulunmasına rağmen Bağzılarında  giriş ınput olarak da kullanılabilmektedir bu durumda PIC e reset atmak gerektiğinde  WDT kullanılanılabilir..

2- Asıl kullanım amacı budur, Programlarda sürekli  ve stack taşmalarına yol açabilecek programın kitlenmesine kısır döngüye girmesine yola açabilecek, düzgün çalışmasının çok önemli olduğu programlarda WTD sayıcısı Programın belirli noktalarında sıfırlanarak taşması önlenir program gidiş hatı hesaplanan şekilde olmadığı taktirde WDT sayıcısı sıfırlanamayacağı için sayıcı taşma anında PIC i resetler..

BODEN = Düşük Voltaj algılama modülüdür. anlaşılacağı gibi Vdd voltajı ortalama 100 us den daha fazla 4 Voltun altına düşerse bu süre boyunca  PIC'i resette tutar.

PWRTE = Power on reset çok faydalı bir modüldür.power on reset'i kullanmanızı tavsiye ederim. Power on reset  PIC'e güç verildikten sonra PIC in besleme voltajının sabit bir seviyeye gelene kadar  (75-100 ms gibi tam hatırlmaıyorum) reset durumunda kalmasını sağlar.

MCLRE = master clear ucunun reset olarak kullanılması onay verilir yada bu pin giriş olarak kullanılabilir..

LVP = Düşük voltajda programlama aktif yada pasif edilir..

CP = Code protect buda yazılım yüklenmeden önce seçilip yüklenirse yazılımın daha sonra okunarak kopya edilmesini önlenir diye hatırlıyorum..

[sitenindelisi]

PIC16F87X devices have a Watchdog Timer, which can be shut-off only through configuration bits. It runs off its own RC  scillator for added reliability. There are two timers that offer necessary delays on power-up. One is the Oscillator Start-up Timer (OST),
intended to keep the chip in RESET until the crystal oscillator is stable. The other is the Power-up Timer (PWRT), which provides a fixed delay of 72 ms (nominal) on power-up only. It is designed to keep the part in
RESET while the power supply stabilizes. With these two timers on-chip, most applications need no external RESET circuitry.

12.12 Watchdog Timer (WDT) The Watchdog Timer is a free running on-chip RC oscillator which does not require any external components. This RC oscillator is separate from the RC oscillator of the OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the OSC1/CLKIN and OSC2/ CLKOUT pins of the device has been stopped, for example, by execution of a SLEEP instruction. During normal  operation, a WDT time-out generates a device RESET (Watchdog Timer Reset). If the device is in SLEEP mode, a WDT time-out causes the device to wake-up and continue with normal operation (Watchdog Timer Wake-up). The TO bit in the STATUS register will be cleared upon a Watchdog Timer time-out. The WDT can be permanently disabled by clearing configuration bit WDTE (Section 12.1). WDT time-out period values may be found in the Electrical Specifications section under parameter #31. Values for the WDT prescaler (actually a postscaler, but
shared with the Timer0  prescaler) may be assigne dusing the OPTION_REG register.

Note 1: The CLRWDT a nd SLEEP instructions clear the WDT and the  postscaler, if assigned to the WDT, and prevent it from timing out and generating a device RESET condition.
2: When a CLRWDT instruction is executed and the prescaler is assigned to the WDT, the prescaler count will be cleared, but the prescaler assignment is not changed.

12.4 Power-On Reset (POR)
A Power-on Reset pulse is generate d on-chip when VDD rise is detected (in the range of 1.2V - 1.7V). To take advantage of the POR, tie the MCLR pin directly  (or through a resistor) to VDD. This will eliminate
external RC components usually needed to create a Power-on Reset. A maximum rise time for VDD is specified. See Electrical Specifications for details. When the device starts normal operation (exits the RESET condition), device operating parameters (voltage,  frequency, temperature,...) must be met to ensure operation. If these conditions are not met, the device must be held in RESET until the operating conditions
are met. Brown-out  Reset may be used to meet the start-up conditions. For additional information, refer to Application Note, AN007, "Power-up Trouble Shooting", (DS00007).

12.5 Power-up Timer (PWRT) The Power-up Timer provides a fixed 72 ms nominal time-out on power-up only from the POR. The Powerup
Timer operates on an internal RC oscillator. The chip is kept in RESET as long as the PWRT is active. The PWRT's time delay allows VDD to rise to an acceptable level. A configuration bit is provided to enable/disable
the PWRT. The power-up time delay will vary from chip to chip due
to VDD, temperature and process variation. See DC parameters for details (TPWRT, parameter #33). 

12.6 Oscillator Start-up Timer (OST)
The Oscillator Start-up Timer (OST) provides a delay of 1024 oscillator cycles (from OSC1 input) after the PWRT delay is over (if PWRT is enabled). This helps to ensure that the crystal oscillator or resonator has
started and stabilized. The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or Wake-up from SLEEP.

12.7 Brown-out Reset (BOR)
The configuration bit, BODEN, can enable or disable the Brown-out Reset circuit. If VDD falls below VBOR (parameter D005, about 4V) for longer than TBOR (parameter #35, about 100μS), the brown-out situation
will reset the device. If VDD falls below VBOR for less than TBOR, a RESET may not occur. Once the brown-out occurs, the device will remain in Brown-out Reset until VDD rises above VBOR. The Power-up Timer then keeps the device in RESET for TPWRT (parameter #33, about 72mS). If VDD should fall below VBOR during TPWRT, the Brown-out Reset process
will restart when  VDD rises above VBOR with the Power-up Timer Reset. The Power-up Timer is always enabled when the Brown-out Reset circuit is enabled, regardless of the state of the PWRT configuration bit. 

12.8 Time-out Sequence
 On power-up, the time-out sequence is as follows: The PWRT delay starts (if enabled) when a POR Reset occurs. Then OST starts counting 1024 oscillator cycles when PWRT ends (LP, XT, HS). When the OST ends, the device comes out of RESET.  If MCLR is kept low long enough, the  time-outs will expire. Bringing MCLR high will begin execution immediately. This is useful for testing purposes or to synchronize
more than one PIC16F87X device operating in parallel.

Table 12-5 shows the RESET conditions for the STATUS, PCON and PC registers, while Table 12-6 shows the RESET conditions for all the registers.

12.9 Power Control/Status Register (PCON)
The Power Control/Status Register, PCON, has up to two bits depending upon the device. Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is
unknown on a Po wer-on Reset. It must then be set by the user and checked on subsequent RESETS to see if bit BOR cleared, indicating a BOR occurred. When the Brown-out Reset is disabled, the state of the BOR bit is unpredictable and is, therefore, not valid at any time. Bit1 is POR (Power-on Reset Status bit). It is cleared on a Power-on Reset and unaffected otherwise. The user must set this bit following a Power-on Reset. 
TABLE 12-3: TIME-OUT IN VARIOUS SITUATIONS