[Çözüldü] Timer, USART, ADC sapıttı

baran123 · 04 Temmuz 2015, 22:42:11

Çıldıracam

ADC yi timer ile 2 saniyelik kesme vasıtası ile USART dan pc ye atacam ama debug yapıyorum kesme içine giriyor fakat mainde flag == ! için bazen giriyor.

Bu kodlar da herhangi bir hata var da sabahtan beri ben mi görmedim ?
STM32F0 da çalıştırıyorum.Üzerinde STM32F051R8T6 var HSI kullanıyorum.Clock ayarları doğrumu ?

system_stm32f0xx.c

#include "stm32f0xx.h"

#define PLL_SOURCE_HSI        // HSI (~8MHz) used to clock the PLL, and the PLL is used as system clock source
//#define PLL_SOURCE_HSE        // HSE (8MHz) used to clock the PLL, and the PLL is used as system clock source
//#define PLL_SOURCE_HSE_BYPASS // HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock

uint32_t SystemCoreClock    = 48000000;
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};

static void SetSysClock(void);

void SystemInit (void)
{
    /* Set HSION bit */
    RCC->CR |= (uint32_t)0x00000001;
    #if defined (STM32F031) || defined (STM32F072) || defined (STM32F042)
    /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
    RCC->CFGR &= (uint32_t)0xF8FFB80C;
    #else
    /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */
    RCC->CFGR &= (uint32_t)0x08FFB80C;
    #endif /* STM32F031*/
    /* Reset HSEON, CSSON and PLLON bits */
    RCC->CR &= (uint32_t)0xFEF6FFFF;
    /* Reset HSEBYP bit */
    RCC->CR &= (uint32_t)0xFFFBFFFF;
    /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
    RCC->CFGR &= (uint32_t)0xFFC0FFFF;
    /* Reset PREDIV1[3:0] bits */
    RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
    /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
    RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;
    /* Reset HSI14 bit */
    RCC->CR2 &= (uint32_t)0xFFFFFFFE;
    /* Disable all interrupts */
    RCC->CIR = 0x00000000;
    /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
    SetSysClock();
}

void SystemCoreClockUpdate (void)
{
    uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0;

    /* Get SYSCLK source -------------------------------------------------------*/
    tmp = RCC->CFGR & RCC_CFGR_SWS;

    switch (tmp)
    {
        case 0x00:  /* HSI used as system clock */
        SystemCoreClock = HSI_VALUE;
        break;
        case 0x04:  /* HSE used as system clock */
        SystemCoreClock = HSE_VALUE;
        break;
        case 0x08:  /* PLL used as system clock */
        /* Get PLL clock source and multiplication factor ----------------------*/
        pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
        pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
        pllmull = ( pllmull >> 18) + 2;

        if (pllsource == 0x00)
        {
            /* HSI oscillator clock divided by 2 selected as PLL clock entry */
            SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
        }
        else
        {
            prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
            /* HSE oscillator clock selected as PREDIV1 clock entry */
            SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
        }
        break;
        default: /* HSI used as system clock */
             SystemCoreClock = HSI_VALUE;
        break;
    }
    /* Compute HCLK clock frequency ----------------*/
    /* Get HCLK prescaler */
    tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
    /* HCLK clock frequency */
    SystemCoreClock >>= tmp;
}

static void SetSysClock(void)
{
    /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/
    #if defined (PLL_SOURCE_HSI)
    /* At this stage the HSI is already enabled */
    /* Enable Prefetch Buffer and set Flash Latency */
    FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
    /* HCLK = SYSCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
    // a -> b |= c
    /* PCLK = HCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
    /* PLL configuration = (HSI/2) * 12 = ~48 MHz */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL12);
    /* Enable PLL */
    RCC->CR |= RCC_CR_PLLON;

    /* Wait till PLL is ready */
    while((RCC->CR & RCC_CR_PLLRDY) == 0)
    {
    }
    /* Select PLL as system clock source */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

    /* Wait till PLL is used as system clock source */
    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
    {
    }
    #else
    #if defined (PLL_SOURCE_HSE)
    __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
    /* Enable HSE */
    RCC->CR |= ((uint32_t)RCC_CR_HSEON);
    #elif defined (PLL_SOURCE_HSE_BYPASS)
    /* HSE oscillator bypassed with external clock */
    RCC->CR |= (uint32_t)(RCC_CR_HSEON | RCC_CR_HSEBYP);
    #endif /* PLL_SOURCE_HSE */

    /* Wait till HSE is ready and if Time out is reached exit */
    do
    {
        HSEStatus = RCC->CR & RCC_CR_HSERDY;
        StartUpCounter++;
    }
    while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

    if ((RCC->CR & RCC_CR_HSERDY) != RESET)
    {
        HSEStatus = (uint32_t)0x01;
    }
    else
    {
        HSEStatus = (uint32_t)0x00;
    }

    if (HSEStatus == (uint32_t)0x01)
    {
        /* Enable Prefetch Buffer and set Flash Latency */
        FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;

        /* HCLK = SYSCLK */
        RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;

        /* PCLK = HCLK */
        RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;

        /* PLL configuration = HSE * 6 = 48 MHz */
        RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
        RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL6);

        /* Enable PLL */
        RCC->CR |= RCC_CR_PLLON;

        /* Wait till PLL is ready */
        while((RCC->CR & RCC_CR_PLLRDY) == 0)
        {
        }
        /* Select PLL as system clock source */
        RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
        RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

        /* Wait till PLL is used as system clock source */
        while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
        {
        }
    }
    else
    { /* If HSE fails to start-up, the application will have wrong clock
    configuration. User can add here some code to deal with this error */
    }
    #endif /* PLL_SOURCE_HSI */
}

main.c

#include "stm32f0xx_conf.h"

static void RCC_Config(void);
static void GPIO_Config(void);
static void ADC_Config(void);
static void UART_Config(void);
static void TIM3_Config(void);
static void NVIC_Config(void);

static char*FloatToString(float f);
static void USART_SendString(USART_TypeDef* USARTx, char* s);

static float ADC_Value, voltage;
static uint8_t flag = 0;

/*
void ADC1_COMP_IRQHandler(void)
{
    if(ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC))
    {

    }
    ADC_ClearITPendingBit(ADC1, ADC_IT_EOC);
}
*/

void TIM3_IRQHandler(void)
{
    if(TIM_GetFlagStatus(TIM3, TIM_FLAG_Update) != RESET)
    {
        flag = 1;
    }
    TIM_ClearITPendingBit(TIM3, TIM_IT_Update);
}

int main(void)
{
    RCC_Config();
    GPIO_Config();
    ADC_Config();
    UART_Config();
    TIM3_Config();
    NVIC_Config();

    while(1)
    {
        ADC_Value = ADC_GetConversionValue(ADC1);
        ADC_Value *= (0.0008056640625);
        voltage = (ADC_Value*100);

        if(flag == 1)
        {
            USART_SendString(USART1, "asdaa");
            flag = 0;
        }
    }
    return (0);
}

static void RCC_Config(void)
{
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
    RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_USART1, ENABLE);
}

static void GPIO_Config(void)
{
    GPIO_InitTypeDef  GPIO_InitStructure;

    GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
    GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
    GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_9 | GPIO_Pin_10; //USART 1 : PA9 = TX, PA10 = RX
    GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_UP;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

    GPIO_Init(GPIOA, &GPIO_InitStructure);

    GPIO_InitStructure.GPIO_Pin     = GPIO_Pin_2;
    GPIO_InitStructure.GPIO_OType   = GPIO_OType_PP;
    GPIO_InitStructure.GPIO_Mode    = GPIO_Mode_AN;
    GPIO_InitStructure.GPIO_PuPd    = GPIO_PuPd_NOPULL;
    GPIO_InitStructure.GPIO_Speed   = GPIO_Speed_50MHz;

    GPIO_Init(GPIOA, &GPIO_InitStructure);
}

static void UART_Config(void)
{
    USART_InitTypeDef USART_InitStructure;

    GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_1);
    GPIO_PinAFConfig(GPIOA, GPIO_PinSource10,GPIO_AF_1);

    USART_InitStructure.USART_BaudRate            = 9600;
    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
    USART_InitStructure.USART_Mode                = USART_Mode_Tx;
    USART_InitStructure.USART_Parity              = USART_Parity_No;
    USART_InitStructure.USART_StopBits            = USART_StopBits_1;
    USART_InitStructure.USART_WordLength          = USART_WordLength_8b;

    USART_Init(USART1, &USART_InitStructure);
    USART_ITConfig(USART1, USART_IT_RXNE, DISABLE);
    USART_Cmd(USART1, ENABLE);
}

static void ADC_Config(void)
{
    ADC_InitTypeDef   ADC_InitStructure;

    ADC_DeInit(ADC1);
    ADC_StructInit(&ADC_InitStructure);

    ADC_InitStructure.ADC_Resolution            = ADC_Resolution_12b;
    ADC_InitStructure.ADC_ContinuousConvMode    = ENABLE;
    ADC_InitStructure.ADC_ExternalTrigConvEdge  = ADC_ExternalTrigConvEdge_None;
    ADC_InitStructure.ADC_DataAlign             = ADC_DataAlign_Right;
    ADC_InitStructure.ADC_ScanDirection         = ADC_ScanDirection_Upward;
    ADC_Init(ADC1, &ADC_InitStructure);

    ADC_ChannelConfig(ADC1, ADC_Channel_2, ADC_SampleTime_239_5Cycles);

    ADC_Cmd(ADC1, ENABLE);
    while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_ADRDY));
    ADC_StartOfConversion(ADC1);
    ADC_ITConfig(ADC1,ADC_IT_EOC, DISABLE);
}

static void TIM3_Config(void)
{
    TIM_TimeBaseInitTypeDef TIM3_InitStructure;

    TIM3_InitStructure.TIM_Prescaler         = 2000;
    TIM3_InitStructure.TIM_CounterMode       = TIM_CounterMode_Up;
    TIM3_InitStructure.TIM_Period            = 48000;
    TIM3_InitStructure.TIM_ClockDivision     = TIM_CKD_DIV1;
    TIM_TimeBaseInit(TIM3, &TIM3_InitStructure);
    TIM_ITConfig(TIM3, TIM_IT_Update, ENABLE);
    TIM_Cmd(TIM3, ENABLE);
}

static void NVIC_Config(void)
{
    NVIC_InitTypeDef  NVIC_InitStructure;

    NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

    NVIC_Init(&NVIC_InitStructure);
}

static void USART_SendString(USART_TypeDef* USARTx, char* s)
{
    while(*s)
    {
        while(!(USARTx ->TDR & 0x00000040));
        USART_SendData(USARTx, *s);
        s++;
    }
    USART_SendData(USARTx, '\r');
    USART_SendData(USARTx, '\n');
}

static char* FloatToString(float f)
{
    char MyText[16];

    sprintf(MyText, "%2.3f", f);
    return (MyText);
}

mesaj birleştirme:: 04 Temmuz 2015, 22:42:50

He bu arada seri çevirici kullanıyorum RX-TX çapraz bağladım.Realterm açınca ERROR simgesi kırmızı oluyor sağ altta.

mesaj birleştirme:: 04 Temmuz 2015, 23:13:17

Elin kaydı sanırım

static void USART_SendString(USART_TypeDef* USARTx, char* s)
{
    while(*s)
    {
        while(!(USARTx ->TDR & 0x00000040)); //TDR nedir arkadaş :)
        USART_SendData(USARTx, *s);
        s++;
    }
    USART_SendData(USARTx, '\r');
    USART_SendData(USARTx, '\n');
}

doğrusu

static void USART_SendString(USART_TypeDef* USARTx, char* s)
{
    while(*s)
    {
        while(!(USARTx->ISR & ((uint32_t)0x00000040)));
        USARTx->TDR = (*s & (uint16_t)0x01FF);
        s++;
    }
    USARTx->TDR = ('\r' & (uint16_t)0x01FF);
    USARTx->TDR = ('\n' & (uint16_t)0x01FF);;
}

Picproje Elektronik Sitesi

Haberler:

[Çözüldü] Timer, USART, ADC sapıttı

baran123