PIC 18F97J60 ve ti CC1101 çalıştırma

[emre salman]

Herkese Merhaba 18f97j60 ile ethernet projesi yapmıştım,
buna şuan CC1101 ile Rf eklemeye çalışıyorum fakat ne yaptıysam bir türlü çalıştıramadım.
aşağıda kodları veriyorum yardım edebilecek varsa çok memnun olurum ben işin içinden çıkamadım.
direkt CC1101Init(); fonksiyonunu çalıştırıyorum yazdığım registeri geri okumaya çalışıyorum olmuyor SPI ile ilgili bir hata mı yapıyorum çözemedim.

#define CC1101_INTERRUPT_TRIS		(TRISBbits.TRISB1)
#define CC1101_INTERRUPT		(TRISBbits.TRISB1)
#define CC1101_CS_TRIS		(TRISDbits.TRISD7)
#define CC1101_CS_IO		(LATDbits.LATD7)
#define CC1101_SCK_TRIS		(TRISDbits.TRISD6)
#define CC1101_SDI_TRIS		(TRISDbits.TRISD5)
#define CC1101_SDO_TRIS		(TRISDbits.TRISD4)
#define CC1101_SPI_IF		(PIR3bits.SSP2IF)
#define CC1101_SDI_IO       (LATDbits.LATD5)
#define CC1101_SCK_IO       (LATDbits.LATD6)
#define CC1101_SDO_IO	(LATDbits.LATD4)
#define CC1101_SSPBUF		(SSP2BUF)
#define CC1101_SPICON1		(SSP2CON1)
#define CC1101_SPICON1bits	(SSP2CON1bits)
#define CC1101_SPICON2		(SSP2CON2)
#define CC1101_SPISTAT		(SSP2STAT)
#define CC1101_SPISTATbits	(SSP2STATbits)



#include "spi.h"
#include "cc1101.h"
#include "HardwareProfile.h"
#include "TCPIP Stack/TCPIP.h"

#if (defined(HPC_EXPLORER) || defined(PIC18_EXPLORER)) && !defined(__18F87J10) && !defined(__18F87J11) && !defined(__18F87J50)
    #define PROPER_SPICON1  (0x20)      /* SSPEN bit is set, SPI in master mode, FOSC/4, IDLE state is low level */
#elif defined(__PIC24F__) || defined(__PIC24FK__)
    #define PROPER_SPICON1  (0x0013 | 0x0120)   /* 1:1 primary prescale, 4:1 secondary prescale, CKE=1, MASTER mode */
#elif defined(__dsPIC30F__)
    #define PROPER_SPICON1  (0x0017 | 0x0120)   /* 1:1 primary prescale, 3:1 secondary prescale, CKE=1, MASTER mode */
#elif defined(__dsPIC33F__) || defined(__PIC24H__) || defined (__dsPIC33E__)|| defined(__PIC24E__)
    #define PROPER_SPICON1  (0x0003 | 0x0120)   /* 1:1 primary prescale, 8:1 secondary prescale, CKE=1, MASTER mode */
#elif defined(__PIC32MX__)
    #define PROPER_SPICON1  (_SPI2CON_ON_MASK | _SPI2CON_CKE_MASK | _SPI2CON_MSTEN_MASK)
#else
    #define PROPER_SPICON1  (0x20)      /* SSPEN bit is set, SPI in master mode, FOSC/16, IDLE state is low level */
#endif


    #define ClearSPIDoneFlag()  {CC1101_SPI_IF = 0;}
    #define WaitForDataByte()   {while(!CC1101_SPI_IF);  CC1101_SPI_IF = 0;}
    #define SPI_ON_BIT          ( CC1101_SPICON1bits.SSPEN)

#define BYTES_IN_RXFIFO     0x7F  	//???????????????????
#define CRC_OK              0x80 	//CRC??????????
BYTE PaTabel[8] = {0x84 ,0x84 ,0x84 ,0x84 ,0x84 ,0x84 ,0x84 ,0x84};

#define WRITE_SINGLE	0X00
#define WRITE_BURST		0X40
#define READ_SINGEL		0X80
#define READ_BURST		0XC0


void spi_writeBurstReg(unsigned char addr,unsigned char *dat,unsigned char cnt)
{
	unsigned char i,temp;
      BYTE vSPIONSave;

    BYTE SPICON1Save;

	temp = addr|WRITE_BURST;
//    SPICON1Save = CC1101_SPICON1;
//    vSPIONSave = SPI_ON_BIT;

    // Configure SPI
//    SPI_ON_BIT = 0;
//    CC1101_SPICON1 = SPICON1Save;
//    SPI_ON_BIT = 1;

    // Set the Write Enable latch
   CC1101_CS_IO = 0;
    while(CC1101_SDI_IO);
      SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;
	spi_rw(temp);
	//WaitForDataByte();
	for(i=0;i<cnt;i++)
	{
		spi_rw(dat[i]);
        //WaitForDataByte();
	}
	CC1101_CS_IO = 0;
}


void OpenSPI2Emre( unsigned char sync_mode, unsigned char bus_mode, unsigned char smp_phase)
{
  SSP2STAT &= 0x3F;               // power on state 
  SSP2CON1 = 0x00;                // power on state
  SSP2CON1 |= sync_mode;          // select serial mode 
  SSP2STAT |= smp_phase;          // select data input sample phase

  switch( bus_mode )
  {
    case 0:                       // SPI2 bus mode 0,0
      SSP2STATbits.CKE = 1;       // data transmitted on rising edge
      break;    
    case 2:                       // SPI2 bus mode 1,0
      SSP2STATbits.CKE = 1;       // data transmitted on falling edge
      SSP2CON1bits.CKP = 1;       // clock idle state high
      break;
    case 3:                       // SPI2 bus mode 1,1
      SSP2CON1bits.CKP = 1;       // clock idle state high
      break;
    default:                      // default SPI2 bus mode 0,1
      break;
  }

  switch( sync_mode )
  {
    case 4:                       // slave mode w /SS enable
	#if defined SPI_IO_V8 
	 	TRISDbits.TRISD3 = 1;       // define /SS2 pin as input
		TRISDbits.TRISD0 = 1;       // define clock pin as input	
    #else
		TRISDbits.TRISD7 = 1;       // define /SS1 pin as input
	 	TRISDbits.TRISD6 = 1;       // define clock pin as input
	#endif
		break;

	case 5:                       // slave mode w/o /SS enable
	#if defined SPI_IO_V8 
	 	TRISDbits.TRISD0 = 1;       // define clock pin as input	
    #else
		TRISDbits.TRISD6 = 1;       // define clock pin as input
	#endif
		break;
	
	default:                      // master mode, define clock pin as output
    #if defined SPI_IO_V8 
	 	TRISDbits.TRISD0 = 0;       // define clock pin as input	
    #else
		TRISDbits.TRISD6 = 0;       // define clock pin as input
	#endif
	   	 break;
  }
	#if defined SPI_IO_V8 
		TRISDbits.TRISD1 = 1;       // define SDI pin as input
	 	TRISDbits.TRISD2 = 0;       // define SDO pin as output	
    #else
		TRISDbits.TRISD5 = 1;       // define SDI pin as input
	 	TRISDbits.TRISD4 = 0;       // define SDO pin as output
    #endif
 
    SSP2CON1 |= SSPENB;             // enable synchronous serial port 
}


void CC1101Init(void)
{

    CC1101_CS_IO = 1;
    CC1101_CS_TRIS = 0;     // Drive SPI EEPROM chip select pin
    CC1101_SCK_TRIS = 0;    // Set SCK pin as an output
    CC1101_SDI_TRIS = 1;    // Make sure SDI pin is an input
    CC1101_SDO_TRIS = 0;    // Set SDO pin as an output
    CC1101_INTERRUPT_TRIS = 1;
    ClearSPIDoneFlag();
  
    #if defined(__C30__)
        EEPROM_SPICON1 = PROPER_SPICON1; // See PROPER_SPICON1 definition above
        EEPROM_SPICON2 = 0;
        EEPROM_SPISTAT = 0;    // clear SPI
        EEPROM_SPISTATbits.SPIEN = 1;
    #elif defined(__C32__)
        EEPROM_SPIBRG = (GetPeripheralClock()-1ul)/2ul/EEPROM_MAX_SPI_FREQ;
        EEPROM_SPICON1 = PROPER_SPICON1;
    #elif defined(__18CXX)
        //CC1101_SPICON1 = PROPER_SPICON1; // See PROPER_SPICON1 definition above
           
            CC1101_CS_IO = 0x00;
        CC1101_SPISTATbits.CKE = 1;     // Transmit data on rising edge of clock
        CC1101_SPISTATbits.SMP = 1;     // Input sampled at middle of data output time
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 0;
 
     // 0
    SPI_ON_BIT = 1;
//   CC1101_SPICON1bits.SSPM0 = 0;
//    CC1101_SPICON1bits.SSPM1 = 1;
//      CC1101_SPICON1bits.SSPM2 = 0;
//       CC1101_SPICON1bits.SSPM3 = 0;
    #endif


    // OpenSPI2Emre(SPI_FOSC_16, MODE_00, SMPEND);
        
    cc1101_power_up_rest();
	halRfWriteRfSettings();
	spi_writeBurstReg(CCxxx0_PATABLE, PaTabel, 8);
     INTCON3bits.INT1IE = 1;
     INTCON3bits.INT1IP = 1;
     INTCON3bits.INT1IF = 0x00;
        
}


unsigned char g_LEN=0;

#define BYTES_IN_RXFIFO     0x7F 
BYTE halRfReceivePacket(BYTE *rxBuffer, BYTE *length) 
{
    BYTE status[2],j;
    BYTE packetLength=0;
	BYTE i=(*length)*4;  // ????????????datarate??length??????

    halSpiStrobe(CCxxx0_SRX);		//?????????
	//while (CC1101_INTERRUPT);
	if ((spi_readStauts(CCxxx0_RXBYTES) & BYTES_IN_RXFIFO)) //??????????????0
	{	
		//j = spi_readStauts(CCxxx0_RXBYTES);
		//uart2_senddate(1,&j);
        packetLength = spi_readReg(CCxxx0_RXFIFO);//?????????????????????????????
		//uart2_senddate(1,&packetLength);

		if (packetLength <= *length) 		//????????????????????????????????????????
		{
            spi_readBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength); //??????????????????
            *length = packetLength;				//????????????????????????????
            spi_readBurstReg(CCxxx0_RXFIFO, status, 2); 	//????????
			halSpiStrobe(CCxxx0_SFRX);		//????????????
			g_LEN = packetLength;
			return (status[1] & CRC_OK);			//?????????????????
        }
		 else 
		{
            *length = packetLength;
			g_LEN = 0;
            halSpiStrobe(CCxxx0_SFRX);		//????????????
			

			return 0;
        }
    } 
	else
 	return 0;
}
  BYTE deneme[8] = {0xff ,0xff ,0xff ,0xff ,0xff ,0xff ,0xff ,0xff};
void halRfSendPacket(BYTE *txBuffer, BYTE size) 
{

	halSpiWriteReg(CCxxx0_TXFIFO, size);
    spi_writeBurstReg(CCxxx0_TXFIFO, txBuffer, size);	//?????????????
	halSpiStrobe(CCxxx0_SIDLE); 	//???????
    halSpiStrobe(CCxxx0_STX);		//????????????????
    //while (!GDO0);
    //while (GDO0);
	halSpiStrobe(CCxxx0_SFTX);
}


unsigned char g_Buf[64];
void interruptRf(void)
{
    BYTE i;
    if( INTCON3bits.INT1IF)
    {
          _asm clrwdt _endasm
        INTCON3bits.INT1IF = 0x00;
        	i = 64;
	if(halRfReceivePacket(g_Buf,&i)==0x80)
	{
		halSpiStrobe(CCxxx0_SRX);
		//uart2_senddate(g_LEN,g_Buf);
		//g_LEN = 0;
		//g_FlashEn = 1;
	}
          
  
	halSpiStrobe(CCxxx0_SRX);
    }
}


unsigned short cc1101Write(BYTE Value)
{
   
    BYTE vDummy;
    BYTE vSPIONSave;

    BYTE SPICON1Save;

    // Save SPI state
//    SPICON1Save = CC1101_SPICON1;
//    vSPIONSave = SPI_ON_BIT;

    // Configure SPI
//    SPI_ON_BIT = 0;
//    CC1101_SPICON1 = PROPER_SPICON1;
//    SPI_ON_BIT = 1;

    // Set the Write Enable latch
    CC1101_CS_IO = 0;
    while(CC1101_SDI_IO);
    CC1101_SSPBUF = Value;
    WaitForDataByte();
    vDummy = CC1101_SSPBUF;
    CC1101_CS_IO = 1;

  
   // SPI_ON_BIT = 0;
    //CC1101_SPICON1 = SPICON1Save;
    //SPI_ON_BIT = vSPIONSave;

    return vDummy;
 }




void halSpiStrobe(unsigned char strobe)
{
     CC1101_CS_IO = 0;
     while(CC1101_SDI_IO);
	//GPIO_WriteLow(GPIOC,GPIO_PIN_3);
	//while(GPIO_ReadInputPin(GPIOC,GPIO_PIN_7));
           SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;
	spi_rw(strobe);
     CC1101_CS_IO = 1;
	//while (!(SPI->SR&0x02));
	//GPIO_WriteHigh(GPIOC,GPIO_PIN_3);
}
    unsigned char spi_readStauts(unsigned char addr)
{
	unsigned char value,temp;
	temp = addr|READ_BURST;
    CC1101_CS_IO = 0;
    while(CC1101_SDI_IO);
          SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;
    spi_rw(temp);
	value= spi_rw(0xff);
	//value= cc1101Write(0xff);
    CC1101_CS_IO = 1;
	return value;
}



#define BYTES_IN_RXFIFO     0x7F  	//???????????????????
#define CRC_OK              0x80 	//CRC??????????
#define GDO0 GPIO_ReadInputPin(GPIOC,GPIO_PIN_4)

const RF_SETTINGS rfSettings = 
	{
		0x00,
		0x08,	// FSCTRL1	 Frequency synthesizer control.
		0x00,	// FSCTRL0	 Frequency synthesizer control.
		0x10,	// FREQ2	 Frequency control word, high byte.
		0xA7,	// FREQ1	 Frequency control word, middle byte.
		0x62,	// FREQ0	 Frequency control word, low byte.
		0xCA,	// MDMCFG4	 Modem configuration.
		0x83,	// MDMCFG3	 Modem configuration.
		0x83,	// MDMCFG2	 Modem configuration.
		0x22,	// MDMCFG1	 Modem configuration.
		0xF8,	// MDMCFG0	 Modem configuration.
	
		0x14,	// CHANNR	 Channel number.
		0x34,	// DEVIATN	 Modem deviation setting (when FSK modulation is enabled).
		0x56,	// FREND1	 Front end RX configuration.
		0x10,	// FREND0	 Front end RX configuration.
		0x18,	// MCSM0	 Main Radio Control State Machine configuration.
		0x16,	// FOCCFG	 Frequency Offset Compensation Configuration.
		0x6C,	// BSCFG	 Bit synchronization Configuration.
		0x43,	// AGCCTRL2  AGC control.
		0x40,	// AGCCTRL1  AGC control.
		0x91,	// AGCCTRL0  AGC control.
	
		0xE9,	// FSCAL3	 Frequency synthesizer calibration.
		0x2A,	// FSCAL2	 Frequency synthesizer calibration.
		0x00,	// FSCAL1	 Frequency synthesizer calibration.
		0x1F,	// FSCAL0	 Frequency synthesizer calibration.
		0x59,	// FSTEST	 Frequency synthesizer calibration.
		0x81,	// TEST2	 Various test settings.
		0x35,	// TEST1	 Various test settings.
		0x09,	// TEST0	 Various test settings.
		0x29,	// IOCFG2	 GDO2 output pin configuration.
		0x06,	// IOCFG0D	 GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
	
		0x04,	// PKTCTRL1  Packet automation control.
		0x05,	// PKTCTRL0  Packet automation control.
		0xFF,	// ADDR 	 Device address.
		0xFF	// PKTLEN	 Packet length.
	};


void halRfWriteRfSettings(void) 
{

	halSpiWriteReg(CCxxx0_FSCTRL0,  rfSettings.FSCTRL2);//??????
   
    
    // Write register settings
    halSpiWriteReg(CCxxx0_FSCTRL1,  rfSettings.FSCTRL1);
  
    halSpiWriteReg(CCxxx0_FSCTRL0,  rfSettings.FSCTRL0);
    halSpiWriteReg(CCxxx0_FREQ2,    rfSettings.FREQ2);
    halSpiWriteReg(CCxxx0_FREQ1,    rfSettings.FREQ1);
    halSpiWriteReg(CCxxx0_FREQ0,    rfSettings.FREQ0);
    halSpiWriteReg(CCxxx0_MDMCFG4,  rfSettings.MDMCFG4);
    halSpiWriteReg(CCxxx0_MDMCFG3,  rfSettings.MDMCFG3);
    halSpiWriteReg(CCxxx0_MDMCFG2,  rfSettings.MDMCFG2);
    halSpiWriteReg(CCxxx0_MDMCFG1,  rfSettings.MDMCFG1);
    halSpiWriteReg(CCxxx0_MDMCFG0,  rfSettings.MDMCFG0);
    halSpiWriteReg(CCxxx0_CHANNR,   rfSettings.CHANNR);
    halSpiWriteReg(CCxxx0_DEVIATN,  rfSettings.DEVIATN);
    halSpiWriteReg(CCxxx0_FREND1,   rfSettings.FREND1);
    halSpiWriteReg(CCxxx0_FREND0,   rfSettings.FREND0);
    halSpiWriteReg(CCxxx0_MCSM0 ,   rfSettings.MCSM0 );
    halSpiWriteReg(CCxxx0_FOCCFG,   rfSettings.FOCCFG);
    halSpiWriteReg(CCxxx0_BSCFG,    rfSettings.BSCFG);
    halSpiWriteReg(CCxxx0_AGCCTRL2, rfSettings.AGCCTRL2);
	halSpiWriteReg(CCxxx0_AGCCTRL1, rfSettings.AGCCTRL1);
    halSpiWriteReg(CCxxx0_AGCCTRL0, rfSettings.AGCCTRL0);
    halSpiWriteReg(CCxxx0_FSCAL3,   rfSettings.FSCAL3);
	halSpiWriteReg(CCxxx0_FSCAL2,   rfSettings.FSCAL2);
	halSpiWriteReg(CCxxx0_FSCAL1,   rfSettings.FSCAL1);
    halSpiWriteReg(CCxxx0_FSCAL0,   rfSettings.FSCAL0);
    halSpiWriteReg(CCxxx0_FSTEST,   rfSettings.FSTEST);
    halSpiWriteReg(CCxxx0_TEST2,    rfSettings.TEST2);
    halSpiWriteReg(CCxxx0_TEST1,    rfSettings.TEST1);
    halSpiWriteReg(CCxxx0_TEST0,    rfSettings.TEST0);
    halSpiWriteReg(CCxxx0_IOCFG2,   rfSettings.IOCFG2);
    halSpiWriteReg(CCxxx0_IOCFG0,   rfSettings.IOCFG0);    
    halSpiWriteReg(CCxxx0_PKTCTRL1, rfSettings.PKTCTRL1);
    halSpiWriteReg(CCxxx0_PKTCTRL0, rfSettings.PKTCTRL0);
    halSpiWriteReg(CCxxx0_ADDR,     rfSettings.ADDR);
    halSpiWriteReg(CCxxx0_PKTLEN,   rfSettings.PKTLEN);
       spi_readReg(CCxxx0_PKTCTRL1);
}



void setRxMode(void)
{
    halSpiStrobe(CCxxx0_SRX);		//?????????
}



void halSpiWriteReg(unsigned char addr,unsigned char dat)
{
    CC1101_CS_IO = 0;
//      SPI_ON_BIT = 0;
//    CC1101_SPICON1 = PROPER_SPICON1;
//    SPI_ON_BIT = 1;
    while(CC1101_SDI_IO);
          SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;
    spi_rw(addr);
    spi_rw(dat);
    CC1101_CS_IO = 1;
    
}


unsigned char spi_rw(unsigned char dat)
{
	BYTE temp;
    CC1101_SSPBUF =dat;
	WaitForDataByte();
	temp= CC1101_SSPBUF;
	return temp;

}

void spi_readBurstReg(unsigned char addr,unsigned char *dat,unsigned char cnt)
{
	unsigned char i,temp;

	
 
    BYTE vSPIONSave;

    BYTE SPICON1Save;
    temp = addr|READ_BURST;
    // Save SPI state
//    SPICON1Save = CC1101_SPICON1;
//    vSPIONSave = SPI_ON_BIT;
//      SPI_ON_BIT = 0;
//    CC1101_SPICON1 = PROPER_SPICON1;
//    SPI_ON_BIT = 1;
    
	 CC1101_CS_IO = 0;

	while(CC1101_SDI_IO);
           SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;
	CC1101_SSPBUF = temp;
	WaitForDataByte();
	for(i=0;i<cnt;i++)
	{
		dat[i] = spi_rw(0);
		//WaitForDataByte();
	}
	 CC1101_CS_IO = 1;
}

unsigned char spi_readReg(unsigned char addr)
{
	unsigned char temp;
    BYTE vSPIONSave;

    BYTE SPICON1Save;
    temp = addr|READ_SINGEL;

    
	 CC1101_CS_IO = 0;
                       // Clear SPI Flag
   SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;       
	while(CC1101_SDI_IO);
	//WaitForDataByte();
	spi_rw(temp);
   // temp= CC1101_SSPBUF;
	//WaitForDataByte();
	temp = spi_rw(0XFF);
//	WaitForDataByte();
	CC1101_CS_IO = 1;
    CC1101_SPI_IF = 0;                            // Disable CS
 
     // Restore SPI state
     SPI_ON_BIT = 0;
     CC1101_SPI_IF = SPICON1Save;
     SPI_ON_BIT = vSPIONSave;
    
    
	return temp;
}


void cc1101_rest(void)
{
	CC1101_CS_IO = 0;
      SPI_ON_BIT = 0;
    CC1101_SPICON1 = PROPER_SPICON1;
    SPI_ON_BIT = 1;
   CC1101_SPI_IF = 0;       
	while(CC1101_SDI_IO);
	spi_rw(0x30);
	while(CC1101_SDI_IO);
	CC1101_CS_IO = 1;
}


void cc1101_power_up_rest(void)
{

    CC1101_CS_IO = 1;
    Delay10us(4);
    CC1101_CS_IO = 0;
    Delay10us(4);
    CC1101_CS_IO = 1;
    Delay10us(50);
    cc1101_rest();
}